Low power digital circuits are essential building blocks for wearable or Internet-of-Things circuits. For such applications, a low power digital circuit typically comprises two parts: a power collapsible part and a retention part. During a retention mode, the supply voltage provided to the power collapsible part is collapsed to 0V whereas the supply voltage to the retention part is kept on to maintain state. It is desirable to provide power supply voltages to both the power collapsible part and the retention part in a manner that is both area and power efficient.